FORTH is a major research centre in Greece; it has 1400 people, and it is internationally acknowledged for its excellence in basic and applied research. The Institute of Computer Science (ICS) of FORTH, with its 38-year history, has 400 people in 8 Laboratories.  Contributions to this project will come from the Computer Architecture and VLSI Systems (CARV) Laboratory of ICS-FORTH, with its 80 people and its 35-year history that includes the design and implementation of dozens of innovative FPGA, ASIC, board, and System Software prototypes.


In RED-SEA, FORTH aims to help to define and realize a successful roadmap for European HPC interconnects, bringing significant know-how from previous European projects. Within the FETHPC projects ExaNeSt and EuroEXA, FORTH has developed a custom network stack (Network Interface + Systems Software + MPI library) that completely offloads the inter-processor communication when running real HPC applications on ARM-based platforms.

In RED-SEA, FORTH will enhance its Network Interface design,  and will tightly-couple it with RISC-V Processors and Accelerators.  In addition, FORTH will contribute novel Congestion Management schemes and will evaluate their performance on real network testbeds. Finally, FORTH will bring to the project relevant HPC and datacentric applications and will strive to accelerate their communication segment.